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NCV8675 350 mA Very Low Iq Low Dropout Linear Regulator with Reset and Reset Delay
The NCV8675 is a precision 5.0 V and 3.3 V fixed output, low dropout integrated voltage regulator with an output current capability of 350 mA. Careful management of light load current consumption, combined with a low leakage process, achieve a typical quiescent ground current of 34 mA. NCV8675 is pin for pin compatible with NCV4275 and it could replace this part when very low quiescent current is required. The output voltage is accurate within 2.0%, and maximum dropout voltage is 600 mV at full rated load current. It is internally protected against input transients, input supply reversal, output overcurrent faults, and excess die temperature. No external components are required to enable these features.
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1 5 D2PAK 5 DS SUFFIX CASE 936A
NC V8675-xx AWLYWWG
* 5 V and 3.3 V Fixed Output (2.5 V Version Available Upon Request) * 2.0% Output Accuracy, Over Full Temperature Range * 34 mA Typical Quiescent Current at IOUT = 100 mA, 50 mA * * *
Maximum up to 85C 600 mV Maximum Dropout Voltage at 350 mA Load Current Wide Input Voltage Operating Range of 5.5 V to 45 V Internal Fault Protection -42 V Reverse Voltage Short Circuit/Overcurrent Thermal Overload AEC-Q100 Qualified EMC Compliant NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes These are Pb-Free Devices
IN Error Amplifier + Current Limit and Saturation Sense OUT
1
Pin 1. I 2. RO Tab, 3. GND* 4. D 5. Q * Tab is connected to Pin 3 on all packages xx A WL Y WW G = 50 (5.0 V Version) = 33 (3.3 V Version) = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
* * * *
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet.
Bandgap Reference Thermal Shutdown D
Reset Generator
GND RO
Figure 1. Block Diagram
(c) Semiconductor Components Industries, LLC, 2007
1
December, 2007 - Rev. 3
Publication Order Number: NCV8675/D
NCV8675
PIN DESCRIPTIONS
Symbol VIN RO GND D VOUT Function Unregulated Input Voltage; 4.5 V to 45 V; Battery Input Voltage. Bypass to GND with a Ceramic Capacitor. Reset Output; Open Collector Active Reset (Accurate when VIN > 1.0 V) Ground; Pin 3 Internally Connected to Tab Reset Delay; Timing Capacitor to GND for Reset Delay Function Output; 2.0%, 350 mA. 22 mF, ESR < 9 W
MAXIMUM RATINGS
Pin Symbol, Parameter Input Voltage Output Voltage Reset Output Voltage Reset Output Current Reset Delay Voltage Reset Delay Current Storage Temperature ESD Capability -Human Body Model -Machine Model Storage Temperature Symbol VIN VOUT VRO IRO VD ID TStg TStg Min -42 -0.3 -0.3 -5.0 -0.3 -2.0 -55 4 200 -55 +150 Max 45 16 25 5.0 7.0 2.0 +150 Unit V V V mA V mA C kV V C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
OPERATING RANGE
Pin Symbol, Parameter Input Voltage Operating Range Junction Temperature Symbol VIN TJ Min 4.5 -40 Max 45 150 Unit V C
THERMAL RESISTANCE
Parameter Junction Ambient Junction Case 1. 1 oz., 100 mm2 copper area. D2PAK D2PAK Symbol Rthja Rthjc Min Max 85.4 6.8 Unit C/W
Pb SOLDERING TEMPERATURE AND MSL
Parameter Lead Temperature Soldering Reflow (SMD styles only), Pb-Free (Note 2) Moisture Sensitivity Level 2. Pb-Free, 60 sec - 150 sec above 217C, 40 sec maximum at peak. Symbol Tsld 265 pk MSL 1 Min Max Unit C
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ELECTRICAL CHARACTERISTICS VIN = 13.5 V, TJ = -40C to +150C, unless otherwise specified
Parameter OUTPUT Output Voltage 5.0 V Version Output Voltage 3.3 V Version Output Voltage 5.0 V Version Output Voltage 3.3 V Version Line Regulation Load Regulation Dropout Voltage 5.0 V Version Dropout Voltage 3.3 V Version Quiescent Current VOUT VOUT VOUT VOUT DVOUT Versus VIN DVOUT Versus. IOUT VIN - VOUT VIN - VOUT Iq 0.1 mA v IOUT v 350 mA (Note 3) 6.0 V v VIN v 16 V 0.1 mA v IOUT v 350 mA (Note 3) 4.5 V v VIN v 16 V 0.1 mA v IOUT v 200 mA (Note 3) 6.0 V v VIN v 40 V 0.1 mA v IOUT v 200 mA (Note 3) 4.5 V v VIN v 40 V IOUT = 5 mA 6.0 V v VIN v 28 V 1.0 mA v IOUT v 350 mA (Note 3) IOUT = 200 mA (Notes 3 and 4) IOUT = 350 mA (Notes 3 and 4) IOUT = 200 mA (Notes 3 and 6) IOUT = 350 mA (Notes 3 and 6) IOUT v 100 mA TJ = 25C TJ = -40C to +85C TJ = 125C IOUT = 50 mA (Note 3) IOUT = 350 mA (Note 3) VRIPPLE = 0.5 VPP, F = 100 Hz IOUT = 0.1 mA to 350 mA COUT ESR COUT ESR 22 9 22 7 4.900 3.234 4.900 3.234 -25 -40 5.000 3.300 5.000 3.300 5 5 215 310 34 34 54 1.8 20 70 5.100 3.366 5.100 3.366 +25 +40 500 600 1.266 1.266 45 50 60 3.5 40 mA %/V mF W mF W V V V V mV mV mV V mA Symbol Test Conditions Min Typ Max Unit
Active ground Current Power Supply Rejection Output Capacitor for Stability 5.0 V Version 3.3 V Version RESET TIMING D AND OUTPUT RO Reset Switching Threshold Reset Output Low Voltage Reset Output Leakage Current Reset Charging Current Upper Timing Threshold Lower Timing Threshold Reset Delay Time Reset Reaction Time PROTECTION Current Limit Short Circuit Current Limit Thermal Shutdown Threshold 5.0 V Version 3.3 V Version
IG (ON) PSRR
VOUT, rt VROL IROH ID,C VDU VLU trd trr
5.0 V Version 3.3 V Version RExt > 5.0k, VOUT > 1.0V VROH = 5.0 V VROH = 3.3 V VD = 1.0 V -
4.50 2.97 2.0 1.2
4.65 3.069 0.20 0 0 4.0 1.3 1.24
4.80 3.168 0.40 10 10 6.5 1.4
V V mA mA V V
CD = 47 nF CD = 47 nF
10 10
16 16 1.5
22 24 4.0
ms ms
IOUT(LIM) IOUT(SC) TTSD
VOUT = 4.5 V (5.0 V Version) VOUT = 3.0 V (3.3 V Version) VOUT = 0 V (Note 3) (Note 5)
350 350 100 150 600 200
mA mA C
3. Use pulse loading to limit power dissipation. 4. Dropout voltage = (VIN - VOUT), measured when the output voltage has dropped 100 mV relative to the nominal value obtained with VIN = 13.5 V. 5. Not tested in production. Limits are guaranteed by design. 6. VDO = VIN - VOUT. For output voltage set to < 4.5 V, VDO will be constrained by the minimum input voltage.
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NCV8675
TYPICAL CHARACTERISTIC CURVES - 5 V Version
12 Unstable Region 10 OUTPUT VOLTAGE (V) Vin = 13.5 V CLOAD w 22 mF 200 300 8 ESR (W) 6 4 2 0 0 Stable Region 100 5 4 3 2 1 0 0 10 20 30 40 50 INPUT VOLTAGE (V) 6
Vin = 13.5 V Load = 5 mA
OUTPUT LOAD (mA)
Figure 2. NCV8675 Stability Curve (5 V Version)
6 5 4 3 2 1 0 0 2 4 6 8 10 INPUT VOLTAGE (V) Vin = 13.5 V Load = 5 mA DROPOUT VOLTAGE (V) OUTPUT VOLTAGE (V) 0.6 0.5 0.4
Figure 3. NCV8675 Input Voltage vs. Output Voltage (Full Range) (5 V Version)
125C
25C 0.3 0.2 0.1 0 0 100 200 LOAD CURRENT (mA) 300 400 -40C
Figure 4. NCV8675 Input Voltage vs. Output Voltage (Low Voltage) (5 V Version)
25 QUIESCENT CURRENT (mA) QUIESCENT CURRENT (mA) 0.5 0.45 20 25C 15 125C -40C 10 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 0 0 100 200 LOAD CURRENT (mA) 300 400 0
Figure 5. NCV8675 Dropout Voltage vs. Load Current (5 V Version)
25C 125C -40C
5 Vin = 13.5 V 0
Vin = 13.5 V 5 10 15 20 25
LOAD CURRENT (mA)
Figure 6. NCV8675 Quiescent Current vs. Load Current (Full Range) (5 V Version)
Figure 7. NCV8675 Quiescent Current vs. Load Current (Light Load) (5 V Version)
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NCV8675
TYPICAL CHARACTERISTIC CURVES - 5 V Version
6 QUIESCENT CURRENT (mA) QUIESCENT CURRENT (mA) Load = 50 mA 5 4 3 2 1 0 0 10 20 30 40 50 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 -50 Vin = 13.5 V Load = 100 mA 0 50 TEMPERATURE (C) 100 150
INPUT VOLTAGE (V)
Figure 8. NCV8675 Quiescent Current vs. Input Voltage (5 V Version)
6 5 OUTPUT VOLTAGE (V) 4 3 2 1 Vin =6.0 V 0 0 100 200 300 400 500 OUTPUT LOAD (mA)
Figure 9. NCV8675 Quiescent Current vs. Temperature (5 V Version)
Figure 10. NCV8675 Output Voltage vs. Output Load (5 V Version)
80 70 60 MAG (dB) 50 40 30
Figure 11. Reset vs. Output Voltage (Vin Rising) (5 V Version)
20 Iout = 100 mA Vin = 13.5 V 10 TA = 25C Cout = 22 mF 0 10 100
1000 FREQUENCY (Hz)
10k
100k
Figure 12. Reset vs. Output Voltage (Vin Falling) (5 V Version)
Figure 13. Power Supply Rejection Ratio (5 V Version)
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NCV8675
TYPICAL CHARACTERISTIC CURVES - 5 V Version
80 70 60 MAG (dB) MAG (dB) Iout = 200 mA Vin = 13.5 V TA = 25C Cout = 22 mF 10 100 1000 FREQUENCY (Hz) 10k 100k 50 40 30 20 10 0 80 70 60 50 40 30 20 10 0 10 Iout = 350 mA Vin = 13.5 V TA = 25C Cout = 22 mF 100 1000 FREQUENCY (Hz) 10k 100k
Figure 14. Power Supply Rejection Ratio (5 V Version)
5.10 5.08 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92 4.90 -50 Vin = 13.5 V -25 0 25 50 75 100 125 150 Iout = 200 mA Iout = 350 mA Iout = 100 mA 5.10 5.08 5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92 4.90 0
Figure 15. Power Supply Rejection Ratio (5 V Version)
25C 125C -40C
Vin = 6.0 V 50 100 150 200 250 300 350 400 450 500 OUTPUT CURRENT (mA)
TEMPERATURE (C)
Figure 16. NCV8675 Output Voltage vs. Temperature (5 V Version)
5.10 5.08 RESET VOLTAGE (V) 5.06 DELAY TIME (ms) 5.04 5.02 5.00 4.98 4.96 4.94 4.92 4.90 -50 -25 0 Iout = 100 mA Vin = 13.5 V 25 50 75 100 TEMPERATURE (C) 125 150 17.5 17 16.5 16 15.5 18
Figure 17. NCV8675 Output Voltage vs. Output Load (5 V Version)
Iout = 100 mA Vin = 13.5 V Cdelay = 47 nF 0 50 100 TEMPERATURE (C) 150
15 -50
Figure 18. NCV8675 Reset Voltage vs. Temperature (5 V Version)
Figure 19. NCV8675 Reset Delay Time vs. Temperature (5 V Version)
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NCV8675
TYPICAL CHARACTERISTIC CURVES - 5 V Version
4.7 4.68 RESET THRESHOLD (V) CURRENT LIMIT (mA) 4.66 4.64 4.62 4.6 4.58 4.56 4.54 4.52 -50 Iout = 100 mA Vin = 13.5 V Rdelay = 5.0 kW 0 50 TEMPERATURE (C) 100 150 860 840 820 800 780 760 740 720 700 680 660 640 620
Vin = 13.5 V -50 -25 0 25 50 75 100 125 150
TEMPERATURE (C)
Figure 20. NCV8675 Reset Threshold vs. Temperature (5 V Version)
Figure 21. NCV8675 Current Limit Threshold vs. Temperature (5 V Version)
Output Voltage
Cout = 22 mF Vin = 13.5 V
Output Load
Figure 22. NCV8675 100 mA - 350 mA Load Transient (5 V Version)
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NCV8675
TYPICAL CHARACTERISTIC CURVES - 3.3 V Version
10 9.0 8.0 7.0 ESR (W) 6.0 5.0 4.0 3.0 2.0 1.0 0 0 Stable Region 50 100 150 200 Cout = 22 mF 250 300 350 Unstable Region OUTPUT VOLTAGE (V) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 Load = 5 mA 0 0 15 30 45 OUTPUT CURRENT (mA) INPUT VOLTAGE (V)
Figure 23. ESR Stability vs. Output Current (3.3 V Version)
70 QUIESCENT CURRENT (mA) 60
Figure 24. Input Voltage vs. Output Voltage (3.3 V Version)
Vin 50 40 30 20 10 0 -50 0 50 TEMPERATURE (C) Vin = 13.5 V Load = 100 mA 100 150 Reset Vout
Figure 25. Quiescent Current vs. Temperature (3.3 V Version)
Figure 26. Reset vs. Output Voltage (Vin Rising) (3.3 V Version)
100 90 Vin 80 70 MAG (dB) 60 50 40 30 Reset 20 10 0 10 Iout = 100 mA Vin = 13.5 V Tamb = 25C Cout = 22 mF 100 1k 10 k 100 k Vout
Figure 27. Reset vs. Output Voltage (Vin Falling) (3.3 V Version)
Figure 28. Power Supply Rejection Ratio (3.3 V Version)
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NCV8675
TYPICAL CHARACTERISTIC CURVES - 3.3 V Version
100 90 80 70 MAG (dB) MAG (dB) 60 50 40 30 20 10 0 10 Iout = 250 mA Vin = 13.5 V Tamb = 25C Cout = 22 mF 100 1k 10 k 100 k 100 90 80 70 60 50 40 30 20 10 0 Iout = 350 mA Vin = 13.5 V Tamb = 25C Cout = 22 mF 10 100 1k 10 k 100 k
Figure 29. Power Supply Rejection Ratio (3.3 V Version)
3.40 3.38 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 3.36 3.34 3.32 3.30 3.28 3.26 3.24 3.22 3.20 0 100 200 300 400 500 OUTPUT LOAD (mA) Vin = 13.5 V 25C 125C -40C 3.40 3.38 3.36 3.34 3.32 3.30 3.28 3.26 3.24 3.22 3.20 -50
Figure 30. Power Supply Rejection Ratio (3.3 V Version)
Vin = 13.5 V Load = 5 mA 0 50 TEMPERATURE (C) 100 150
Figure 31. Output Voltage vs. Output Load (3.3 V Version)
25
Figure 32. Output Voltage vs. Temperature (3.3 V Version)
20 DELAY TIME (ms)
15
10 Vin = 13.5 V Load = 100 mA
5 0 -50
0
50 TEMPERATURE (C)
100
150
Figure 33. Reset Delay Time vs. Temperature (3.3 V Version)
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NCV8675
VIN IN CIN 100 nF ID CD 47 nF D 4 3 GND IG 1 NCV8675 2 RO IRO 5 OUT COUT 22 mF IOUT VOUT REXT 5.0 K VRO
Figure 34. Application Circuits Circuit Description
The NCV8675 is an integrated low dropout regulator that provides 5.0 V 350 mA, or 3.3 V 350 mA protected output and a signal for power on reset. The regulation is provided by a PNP pass transistor controlled by an error amplifier with a bandgap reference, which gives it the lowest possible drop out voltage and best possible temperature stability. The output current capability is 350 mA, and the base drive quiescent current is controlled to prevent over saturation when the input voltage is low or when the output is overloaded. The regulator is protected by both current limit and thermal shutdown. Thermal shutdown occurs above 150C to protect the IC during overloads and extreme ambient temperatures. The delay time for the reset output is adjustable by selection of the timing capacitor. See Figure 34, Test Circuit, for circuit element nomenclature illustration.
Regulator
Figure 2 for specific ESR ratings. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25C to -40C), both the capacitance and ESR of the capacitor will vary considerably. The capacitor manufacturer's data sheet usually provides this information. The value for the output capacitor COUT shown in Figure 13, Test Circuit, should work for most applications; however, it is not necessarily the optimized solution.
Reset Output
The error amplifier compares the reference voltage to a sample of the output voltage (VOUT) and drives the base of a PNP series pass transistor by a buffer. The reference is a bandgap design to give it a temperature-stable output. Saturation control of the PNP is a function of the load current and input voltage. Oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized.
Regulator Stability Considerations
The reset output is used as the power on indicator to the microcontroller. This signal indicates when the output voltage is suitable for reliable operation of the controller. It pulls low when the output is not considered to be ready. RO is pulled up to VOUT by an external resistor, typically 5.0 kW in value. The input and output conditions that control the Reset Output and the relative timing are illustrated in Figure 35, Reset Timing. Output voltage regulation must be maintained for the delay time before the reset output signals a valid condition. The delay for the reset output is defined as the amount of time it takes the timing capacitor on the delay pin to charge from a residual voltage of 0 V to the upper timing threshold voltage VDU of 1.3 V. The charging current for this is ID of 4 mA. By using typical IC parameters with a 47 nF capacitor on the D Pin, the following time delay is derived:
t RD + C D * V DU I D t RD + 47 nF * (1.3 V) 4 mA + 15.3 ms
The input capacitor (CIN) is necessary to stabilize the input impedance to avoid voltage line influences. The output capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. Ceramic, tantalum, or electrolytic capacitors of 22 mF, or greater, are stable with very low ESR values. Refer to
Other time delays can be obtained by changing the CD capacitor value. The Delay Time can be reduced by decreasing the capacitance of CD. Using the formula above, Delay can be reduced as desired. Leaving the Delay Pin open is not desirable as it can result in unwanted signals being coupled onto the pin.
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NCV8675
VI
t
VOUT
< Reset Reaction Time VOUT,rt t Reset Charge Current dVD + dt CD
VD
Upper Timing Threshold VDU Lower Timing Threshold VDL t Reset Delay Time Reset Reaction Time
VRO
t Power-on-Reset Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output
Figure 35. Reset Timing
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NCV8675
Calculating Power Dissipation in a Single Output Linear Regulator Heatsinks
The maximum power dissipation for a single output regulator (Figure 36) is:
PD(max) + [VI(max) * VOUT(min)] IOUT(max) ) VI(max)Iq
(1)
where is the maximum input voltage, VI(max) VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, Iq is the quiescent current the regulator consumes at IQ(max). Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated:
T RqJA + 150C * A PD
(2)
A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RqJA:
RqJA + RqJC ) RqCS ) RqSA
(3)
where RqJC is the junction-to-case thermal resistance, RqCS is the case-to-heatsink thermal resistance, RqSA is the heatsink-to-ambient thermal resistance. RqJC appears in the package section of the data sheet. Like RqJA, it too is a function of package type. RqCS and RqSA are functions of the package type, heatsink and the interface between them. These values appear in heatsink data sheets of heatsink manufacturers. Thermal, mounting, and heatsinking considerations are discussed in the ON Semiconductor application note AN1040/D.
The value of RqJA can then be compared with those in the package section of the data sheet. Those packages with RqJA's less than the calculated value in Equation 34 will keep the die temperature below 150C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required.
II VI SMART REGULATOR(R) IOUT VOUT
} Control Features
Iq
Figure 36. Single Output Regulator with Key Performance Parameters Labeled
THERMAL RESISTANCE JUNCTION-TO-AIR (C/W)
100
100
75 R(t), (C/W) 10 D2PAK
50
D2PAK 1 oz D2PAK 2 oz
1
25 Single Pulse 0 0 100 200 300 400 500 600 700 800 900 COPPER AREA (mm2) 0.1 0.000001 0.0001 0.01 1 PULSE TIME (sec) 100
Figure 37.
Figure 38. NCV8675 @ PCB Cu Area 100 mm2 PCB Cu thk 1 oz
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NCV8675
EMC-Characteristics: Conducted Susceptibility
All EMC-Characteristics are based on limited samples and no part of production test according to 47A/658/CD IEC62132-4 (direct Power Injection).
Test Conditions
Supply Voltage Vin = 12 V Temperature TA = 23C + -5C Load RL = 100 W Direct power Injection 33d Bm (Note 1) forward power CW for global pin (Note 2) 17 dBm (Note 1) forward power CW for local pin (Note 3)
L1 FERRITE
Acceptance Criteria Amplitude Dev. max 4% of Output Voltage Reset outputs remain in correct state + -1 V 1. dBm means dB milli-Watts, P(dBm) = 10 log (P(mW)) 2. A global pin carries a signal or power which enters or leaves the application board 3. A local pin carries a signal or power which does not leave the application board. It remains on the application board as a signal between two components
L3 FERRITE
X1 VIN_DC
X5 VOUT_DC
X2 VIN_HF
C2 15 mF
C1 100 nF NCV8675 1I 2 RO O5 D 4
C4 47 nF
C5 22 mF
X6 VOUT_HF
VOUT
L2 FERRITE X3 RO_DC
GND 3 U1
L4 FERRITE
X7 D_DC
X4 RO_HF
R1 4.99k VOUT
C6 47 nF
X8 D_HF
Figure 39. Test Circuit
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40 40
30
Vin Pass 33 dBm
30
Vout Pass 33 dBm
(dBm)
20
(dBm) 1 10 100 FREQUENCY (MHz) 1000
20
10
10
0
0 1 25
25
Figure 40. Typical Vin Pin Susceptibility
Figure 41. Typical Vout Pin Susceptibility
10 100 FREQUENCY (MHz)
1000
20 RO Pass 17 dBm (dBm)
20 Delay Pass 17 dBm
15 (dBm)
15
10
10
5
5
0 1 10 100 FREQUENCY (MHz) 1000
0 1 10 100 FREQUENCY (MHz) 1000
Figure 42. Typical RO Pin Susceptibility ORDERING INFORMATION
Device NCV8675DS50G NCV8675DS50R4G NCV8675DS33G NCV8675DS33R4G Package D2PAK (Pb-Free) D2PAK (Pb-Free) D2PAK (Pb-Free) D2PAK (Pb-Free)
Figure 43. Typical Delay Pin Susceptibility
Shipping 50 Units / Rail 800 / Tape & Reel 50 Units / Rail 800 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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NCV8675
PACKAGE DIMENSIONS
D2PAK 5 CASE 936A-02 ISSUE C
-TA K B
12345 OPTIONAL CHAMFER TERMINAL 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL 6. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAXIMUM. INCHES MIN MAX 0.386 0.403 0.356 0.368 0.170 0.180 0.026 0.036 0.045 0.055 0.067 BSC 0.539 0.579 0.050 REF 0.000 0.010 0.088 0.102 0.018 0.026 0.058 0.078 5 _ REF 0.116 REF 0.200 MIN 0.250 MIN MILLIMETERS MIN MAX 9.804 10.236 9.042 9.347 4.318 4.572 0.660 0.914 1.143 1.397 1.702 BSC 13.691 14.707 1.270 REF 0.000 0.254 2.235 2.591 0.457 0.660 1.473 1.981 5 _ REF 2.946 REF 5.080 MIN 6.350 MIN
E
U V
S H M L
D 0.010 (0.254)
M
T
N G R
P
C
SOLDERING FOOTPRINT*
8.38 0.33
DIM A B C D E G H K L M N P R S U V
1.702 0.067 10.66 0.42 1.016 0.04
3.05 0.12 16.02 0.63
SCALE 3:1
mm inches
5-LEAD D2PAK
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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